I thought most Ethernet PHYs don't lock actually to the clock, but instead use a FIFO that starts draining once it's half way full. The size of this FIFO is such that it doesn't under or overflow given the largest frame size and worst case 200 PPM difference.
I figured this is what the interframe gap is for - to allow the FIFO to completely drain.
IFP is really more to let the receiver knows where one stream of bits stop and the next stream of bits start. How they handle the incoming spray of data is up to them on a queue/implementation level.
I figured this is what the interframe gap is for - to allow the FIFO to completely drain.